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Robert Hanson, M.S.E.E., President, Americom Seminars, Internationally Recognized Expert with over 40 years of experience.

Americom Seminars has provided outstanding electrical engineering seminars for over 25 years!

Mr. Hanson teaches a variety of courses.
Choose from any of Robert Hanson's renowned high technology seminars. Each is carefully designed to meet your needs and Mr. Hanson comes to your location.

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        Mr. Hanson will present to your company on your schedule.

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STEPS BEYOND FOR SIGNAL INTEGRITY: ADVANCED HIGH SPEED DIGITAL DESIGN THEORY AND APPLICATION SEMINARS

This three-day course is tailored to the high-speed digital design engineer who wants to go a step beyond and delve into a deeper understanding of high-speed phenomena. With edge rates ever decreasing and clock rates becoming faster, it is vital that engineers understand the underlying issues of the transmission line to insure signal integrity. Also, bypassing these higher frequency edge rates and the ever increasing power of today FPGAs and micros requires a better grasp of signal power switching. PCBs are becoming more complex, with finer traces and spaces and more layers with more blind and buried vias. This requires more attention to controlling crosstalk, EMI and impedance control. This course will cover 1) all transmission line loss concepts including the four performance regions; 2) PCB effects for high speed transmission; 3) bypassing high edge rate/high power ICs; 4) advanced concepts of single ended and differential signaling and 5) how to overcome eye closure for high speed, long haul transmission media (backplanes, motherboards and connectors/cables). These and many more issues are presented along with solutions that the leading edge companies are using to solve the ever increasing sophistication of today’s state of the art designs.

 

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BENEFITS OF THIS COURSE

·        Deep, advanced knowledge of high-edge rate and high-power device issues.  Practical applications are presented to address current and future design issues.

·        Information that helps you layout traces on PCB boards more efficiently because you will learn the effects of the PCB parameters on high-speed transmission for both single-ended and differential transmissions.

·        Exposure to the effects of transmission line quality for GHz transmission and how pre-emphasis and equalization techniques are implemented.  The course will help you to attain solutions for these situations more easily and accurately.

·        Capability to properly bypass and control power switching (PDS), a high-power IC/high-frequency (edge rate) digital system.  You will go that one “step beyond” when you learn leading edge advanced concepts in bypassing for high-edge rate and high-power devices.

 

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MATERIAL COVERED IN THIS COURSE

Advanced High Speed Concepts

Impedance of structures to both clock rate harmonics and edge rate harmonics

Resonance on Transmission Lines: Serial and Parallel resonance. Quarter wave length differences of high and low end impedance termination.

Near field and far field definitions and their effects on the magnetic and electric field strengths

The quality factor for lumped circuitry: Why they can ring, crosstalk and cause EMI radiation

 

Transmission Lines (TL)

The TL Cell-Defining, Rdc, Rac, Skin Effect, Proximity, and the Dielectric Loss

Current Travel on TLs: Converting the B field to eddy currents and how it creates the skin effect and proximity effect

Characteristics of PCB Material: What material is used for high frequency: DF, Cost, DFM, DFA

 

Performance Regions

The basic RLGC cell and its effect on rising and falling edges

The Lumped Element region-parameters and model

Practical applications of the lumped model

The RC Region of the lumped model. Input/characteristic/Output impedance. Propagation velocity, Elmore’s delay and lumped model algorithm

The Constant Loss Region: Boundary Conditions, propagation coefficient, resonance, termination considerations

The Skin Effect Region: Boundary Conditions, characteristic impedance, propagation delay parameters, termination options, speed, and distance

Dielectric Region: Boundary Conditions, characteristic impedance, dielectric loss/tangent loss, propagation delay, resonance, terminationThe Printed Circuit Board (PCB)

Modeling PCB Traces

Skin Effect and Dielectric Loss for PCB Traces: microstrip and stripline

Dielectric Properties, relative costs and core/prepreg issues for high speed stackups

Effects of temperature, frequency and mfg tolerance on characteristic impedance

Solder Mask and Conformal Coating: effects on Z0, propagation delay and impedance equations

Matching Capacitive and inductive loads using trace width modification

Far end and Near end Crosstalk: Inductive and capacitive for microstrips and striplines

Matching traces to connectors: Minimizing reflections, crosstalk and EMI

Vias: C and L of vias (through hole, blind, buried), via discontinuities and eliminating reflections of vias

 

Advanced Topics in Bypassing

Shoot through current and die capacitance

Eliminating mode conversion

Why the 0201, the long electrode and the Y cap may be essential to control switching impedance and EMI radiation

Breakout and bypassing the 4, 5, 6 perimeter ring and fully populated BGA

Do copperfills (pours) really help in bypassing?

What is the present status of innerplane C materials (FR4, ceramic filled, and polymide) and how thin can they practically be made?

How much C is needed and layout considerations for today’s FPGAs and micros

Return current and intelligent via placement

Differential Signaling

Attributes/drawbacks of loosely/tightly coupled differential pairs

Definition and examples of differential and common mode V and I

Differential impedance: Odd and even modes

Advantages and disadvantages of Edge (side by side), Broadside (dual), asymmetric, and microstrip differentials

Reflections and crosstalk in differentials. Metastability, Clk skew, driver skew, bit pattern sensitivity, ISI, skin effect and dielectric constant. Jitter, BER, and the eye diagram

Matching electrical lengths

 

High Speed Clocking

Clock skew and jitter

PLLs, DDLs, serpentine traces and programmable delays

Source and end termination considerations for star, daisy chain and driving multiple loads

Clock driving high speed buses: RAMbus and address drivers, minimizing the C load.

Random and deterministic jitter. Power Supply noise and Clk jitter

 

High Speed Data Transmission

Pre-emphasis and equalization Techniques

The effects of ISI, Skin and dielectric losses

The effect of various base materials of long haul transmission. The effects of eye closure on BER

A real world example of compensation techniques

 

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Comments about the web pages, contact Jim Hanson at hansonjb@gmail.com

 

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Comments about the web pages, contact Jim Hanson at hansonjb@gmail.com